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13 Apr 2024 Job Information Organisation/Company Ruhr University Bochum Research Field Computer science » Computer architecture Researcher Profile Recognised Researcher (R2) Established Researcher
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leadership of the team in the areas of circuit design and SERDES architectures Work with global teams (US, west coast and east coast), which work in different time-zones Job Qualifications: Candidate’s
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Deutsches Zentrum für Luft - und Raumfahrt (DLR) | Ulm, Baden W rttemberg | Germany | about 1 month ago
solutions in ambitious application classes. “Safety and security by design” is a central aspect in this context, since it directly supports future requirements of safety-critical applications that are based
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Deutsches Zentrum für Luft - und Raumfahrt (DLR) | Braunschweig, Niedersachsen | Germany | about 1 month ago
multidisciplinary analysis and design capabilities to virtual certification. In addition to the physical modelling of complex flows and the development of advanced solution algorithms for numerical flow simulation
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Deutsches Zentrum für Luft - und Raumfahrt (DLR) | Gottingen, Niedersachsen | Germany | about 1 month ago
multidisciplinary analysis and design capabilities to virtual certification. In addition to the physical modelling of complex flows and the development of advanced solution algorithms for numerical flow simulation
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Deutsches Zentrum für Luft - und Raumfahrt (DLR) | Bremerhaven, Bremen | Germany | about 1 month ago
studies for various system concepts Specification of system architecture and system components Software development for the design of various system components and their integration into an overall system
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Master's degree in Computer Science, Engineering, Information Systems, or related field and 1+ year of Hardware Engineering, Software Engineering, Systems Engineering, or related work experience. OR PhD in
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-based information portal to manage digital scholarly resources (e.g. publications, research data) in close exchange with the scientific community Design and implementation of an architecture with
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workflows on tens of thousands of WGS samples within a cloud computing architecture, enabling scalable, safe, and reproducible on-demand data processing and archiving. Furthermore, the candidate will have a
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topology. The selected architecture will be designed as schematic and validated in Virtuoso. In the next step, the DAC layout will be done in a selected target technology and the Digital-To-Analog-Converter